module BUS(
////////////////// MEM /////////////////
MEM_ADDR,
MEM_DATA,
WE_N,
OE_N,
UB_N,
LB_N,
CE_N,
////////////////// VGA /////////////////
VGA_ADDR,
VGA_DATA,
V_SYNC,
VGA_WHICH_BYTE,
////////////////// INIT ////////////////
INIT_ADDR,
INIT_DATA,
WAIT,
INIT_WHICH_BYTE,
////////////////////////////////////////
);

///////////////// MEM /////////////////
output [17:0] MEM_ADDR;
inout [15:0] MEM_DATA;
output WE_N;
output OE_N;
output UB_N;
output LB_N;
output CE_N;

///////////////// VGA //////////////////
output [7:0] VGA_DATA;
input [17:0] VGA_ADDR;
input VGA_WHICH_BYTE; //1 = UPPER
input V_SYNC;

///////////////// INIT /////////////////
input [17:0] INIT_ADDR;
input [15:0] INIT_DATA;
input INIT_WHICH_BYTE;//1 = UPPER
output WAIT;

////////////////////////////////////////


assign WAIT = V_SYNC;

assign MEM_DATA[15:0] = 16'hzzzz;

assign MEM_DATA[7:0] = (!WAIT & !INIT_WHICH_BYTE)?INIT_DATA[7:0]:8'bz;
assign MEM_DATA[15:8] = (!WAIT & INIT_WHICH_BYTE)?INIT_DATA[7:0]:8'bz;

assign VGA_DATA[7:0] = ((!CE_N & !OE_N) ? ( (VGA_WHICH_BYTE)? MEM_DATA[15:8]:MEM_DATA[7:0])   :8'bz);

assign MEM_ADDR = (!WAIT)?INIT_ADDR:VGA_ADDR;

assign WE_N = WAIT;
assign OE_N = !WAIT;
assign UB_N = (!WAIT)?!INIT_WHICH_BYTE:!VGA_WHICH_BYTE;
assign LB_N = (!WAIT)?INIT_WHICH_BYTE:VGA_WHICH_BYTE;

assign CE_N = 0;

endmodule
